Can I connect a uC like AT89C52 or P89V51RD2 to another chip with 12-bit I/O (parallel ADC), using P0+P2 as data bus and bit-banging P3[7:4] as controls (read/write/chip select/status in), then connect an IDE drive using P0+P2 too and P1 as controls (*), and last but not least for a datalogger project, a DS12C887 RTC that has a builtin latch ?

In which state are found P0,P2,RD,WR after an external memory access ? Will I have to rewrite FF to P0 and P2 before being able to read data again from a direct connection ?

*I successfully tried pjrc.com's IDE routines on a 16-year old 80C31 connected to an even older Intel 8255 probably in NMOS technology, tested with a 16 MB CF card in IDE to CF adapter, and a 6 GB 3.5" HD. To avoid beeing lynched here, I will not use my remaining new old stock of 82C55/D71055SC for new designs (as they are able to source at least 10 mA, I will use my existing development board to drive seven-segment LED displays). Just have to rewrite the code for "faster" (still PIO0) direct I/O. As long as there are no free specs for recent low-pin-count flash cards like SD or MemoryStick, I will stick to IDE parallel interface (CF or SSD) and have tens of gigabytes of storage.