| Frieder Ferlemann 06/19/09 14:09 Read: 250 times Old Europe |
#166263 - P3_3 commonly for ROM and RAM to switch banks? Responding to: Sandeep Gupta's previous message |
> I am using Port pin Port 3^3 commonly for ROM and RAM to shuffle between banks
Is P3_3 directly connected to A16 of SRAM/ROM? Or are some logic gates (using P3_3, PortA15 and possibly A14, A13 as inputs) involved? How does your (expected) memory map look like? ROM (32 common + 2*32 switched) kByte and SRAM 2*64 switched kByte or: ROM (16 common + 2*48 switched) kByte and SRAM (32 common + 2*32 switched) kByte. or something else? If a single bit for the switching is used then flash and SRAM are switched concurrently. So f.e. no xdata access to (the switched part of) SRAM bank 1 data from CODE bank 0. |
| Topic | Author | Date |
| Code and XDatabanking | Sandeep Gupta | 06/16/09 02:55 |
| Manually handle a few large variables? | Per Westermark | 06/16/09 03:39 |
| Code and XDatabanking | Sandeep Gupta | 06/19/09 01:54 |
| You missed the point! | Andy Neil | 06/19/09 06:16 |
| Do you *have* to use an 8051? | Andy Neil | 06/19/09 02:07 |
| Code and XDatabanking | Sandeep Gupta | 06/19/09 05:35 |
| Fair enough, then! | Andy Neil | 06/19/09 06:10 |
| no banking | Erik Malund | 06/19/09 08:33 |
| Cross reference | Andy Neil | 06/19/09 08:49 |
| Verbiage | Erik Malund | 06/19/09 09:48 |
| P3_3 commonly for ROM and RAM to switch banks? | Frieder Ferlemann | 06/19/09 14:09 |
| that will not work | Erik Malund | 06/19/09 14:44 |
Interference | Per Westermark | 06/19/09 15:05 |



