It's not the value of R1 what counts, but R0.

MOV R1, 0 moves the content of address 0 to R1. Address 0 is identical to R0 (unless banks have been switched, which is not your case).


You might not be aware of the fact, that the datasheet is not the only source of information. In the '51 world, it is a custom (started by Intel itself) to keep the "common information" in one document (dubbed as "bible" here - see http://www.8052.com/faqs/120112) and only "model-specific information" in the datasheet itself.

Funnily, somehow the section on reset behaviour is missing from the current Atmel's version of "bible" (although the content lists it...)

The Philips version (_HARDWARE_) says it, by the end of page 18:

That is ALL internal memory, 0-FF (and in the RD2/ED2, this is valid for the internal ERAM, too)


SFRs are 'forgotten', too. Most of them are set to a defined state upon subsequent reset, though. Read again the reset section of "bible" carefully.

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Look, to implement a reset IC is staying on the safe side. The description of internal reset in the datasheets leaves too many questions open, e.g. whether there is a guarantee that the reset will last until the oscillator stabilises - there's no spec on the duration of the internal reset whatsoever.

Strictly speaking, at 48MHz the internal reset is insufficient anyway, as it releases at around 2.5V, and above 40MHz the operation below 4.5V is unspecified.

You might perhaps want to read the pamphlet on reset I wrote (and never finished... :-( ).


Yes, but it works up to 60MHz only in the 12-clock mode. Make sure you don't set the x2 fuse.


Although the datasheet is far from being clear in this question, it would be foolish from Atmel if it would not have it.

JW