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Jim Granville
09/26/12 19:46
Read: 752 times


 
#188468 - Or narrow pulses ?
Responding to: ???'s previous message
Harry Leung said:
We did notice that it seems to have problem with the lowest 8 address bit which is multiplexed for 8051. The 8051 write to a wrong address. The 68k side seems OK. Could the issues is with the latch circuit?

Or, it may be the hardware has narrow/runt pulses, that the slower RAM ignored, and the new RAM now sees... check the ram WRN signal has no glitches, and changes always inside any address changes.

List of 18 messages in thread
TopicAuthorDate
SRAM issues      Harry Leung      09/26/12 04:09      
   Setup and hold times?      Per Westermark      09/26/12 04:21      
      RAM issues      Harry Leung      09/26/12 06:13      
         Or narrow pulses ?      Jim Granville      09/26/12 19:46      
      Address setup time      Harry Leung      10/02/12 20:48      
   did you change the arbitration?      Erik Malund      09/26/12 07:18      
      Ram issues      Harry Leung      09/26/12 07:36      
   P0, P2 for memory only, or ...      Erik Malund      09/26/12 09:04      
      p0 and p2      Harry Leung      09/27/12 03:29      
         If you latch both P0 and P2, there will be stabile A15-A0      Richard Erlacher      09/27/12 11:24      
   Arbitration circuit      Oliver Sedlacek      09/26/12 10:08      
   It's a bit tricky synchronizing an 805x with 68k series      Richard Erlacher      09/26/12 15:51      
   you are using a latch, and not a flipflop, right?      Richard Erlacher      09/26/12 22:54      
      FF or latch      Harry Leung      09/27/12 03:30      
         It's a mistake I've seen a time or two ...       Richard Erlacher      09/27/12 11:19      
            time wasting      Stefan KAnev      09/27/12 13:24      
               no circuit diagram      Harry Leung      09/27/12 20:38      
                  You don't have to do that      Richard Erlacher      10/05/12 13:45      

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