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Richard Erlacher
12/04/12 08:59
Read: 900 times
Denver, Co
USA


 
#188962 - I believe it
Responding to: Kai Klaas's previous message
It's absolutely the case that the newer 805x-core MCU's have more features, and, perhaps, considerably less in common with the original pre-1980 parts. However, despite the fact that those early parts lacked the internal supervoltage-generating charge pumps required for FLASH writing/erasing, the fact that those early parts could corrupt BBRAM in a manner and under circumstances similar to the ones under which FLASH corruption occurs, i.e. during Vdd decay with active RESET, persuades me that there's still a common issue, perhaps associated with the relationship, as the datasheet to which you refer, wherein the relationship between RESET and the Vdd level becomes dangerous.

I believe that you, Kai, once pointed out that there might have been oscillator startup issues that required the long-time-constant in the RESET circuit that Intel originally recommended. That time constant is very much longer than the >24 oscillator cycles that were the specified minimum length RESET pulse width. If that long RESET is required to ensure that the oscillator is stabile, and perhaps also that whatever internal processes that are kept secret can be ensured complete, then someone should have told us. Nevertheless, I find it unpleasant that on not-so-rare occasion, the MCU runs on during active RESET, once the Vdd is well below specified limits, but still high enough to cause problems, and perhaps still exceed the minima specified for other in-system (such as the BBRAM with which I first encountered this anomaly).

The circumstance to which I refer is, of course, a specific one, but since the problem to which I refer occurs with components of vintage ranging from 2002 (as in the Maxim/Dallas DS89C420) back to the 1980-marked Intel 8751H, also including parts from Siemens, Philips, and AMD, I believe it's something that, at least as recently as a decade ago, persisted in many of the common variants. However, I suspect that whatever causes this specific failure mode is still intrinsic to the chip design, and must therefor be dealt with. The fact that I observed this in a circuit with a supervisor IC suggests to me that the run-on problem occurs during decay of Vdd and not during power-up. For that reason, it's likely that it could occur during any brownout condition.

I'm still anxious to find some sort of specification that actually sets a minimum on safe rise and fall of the positive supply to 805x-core MCU's. I still don't see this as being directly addressed in any specification, aside, perhaps, from the early Intel specification. That one, however, doesn't say anything about the decay. It's safe minimal limits on the rise and fall of Vdd that I'm seeking, however, and not just recommendations. I know that I can exercise the IC through a million cycles with no ill effect, and then, on the next cycle, have a problem. Without a manufacturer's specification, we're all on our own.

RE


List of 33 messages in thread
TopicAuthorDate
C8051F231 experiences      Daniel Contarino      11/30/12 14:43      
   another solution      Erik Malund      11/30/12 15:11      
   The probabilities are low...      Daniel Contarino      11/30/12 18:34      
      think about what happens when you add a finger      Richard Erlacher      11/30/12 22:55      
         The point is ...      Daniel Contarino      12/01/12 03:08      
            Yes ... the underlying issue is the flash ...       Richard Erlacher      12/01/12 11:28      
               Out of my office, but...      Daniel Contarino      12/01/12 14:05      
                  Don't think in Vcc, ESD or hum...      Daniel Contarino      12/02/12 09:24      
   Apparently several C8051F2xx parts have the same pinout      Richard Erlacher      12/01/12 14:25      
   Characteristic for in system programmable flash micros...      Kai Klaas      12/01/12 18:25      
      All too true ... sadly ...       Richard Erlacher      12/01/12 20:13      
         Power-on slope rate...      Kai Klaas      12/02/12 05:31      
            Sorry, my post should be here, no up there...      Daniel Contarino      12/02/12 09:58      
            Have you any basis for that rate?      Richard Erlacher      12/02/12 10:15      
               Vdd ramp time      Maarten Brock      12/03/12 06:15      
               Some datasheets show numbers...      Kai Klaas      12/03/12 07:05      
                  Those aren't the "usual" 805x-core MCU's      Richard Erlacher      12/03/12 17:43      
                     There aren't many "usual" 8051-cores anymore...      Kai Klaas      12/03/12 18:13      
                        How dangerous power ups can be...      Kai Klaas      12/04/12 06:20      
                           I believe it      Richard Erlacher      12/04/12 08:59      
                              (dV/dt) examples      Jim Granville      12/04/12 13:14      
                                 They don't know it either...      Kai Klaas      12/04/12 18:49      
                                    dV/dT etc       Jim Granville      12/04/12 21:39      
                                       reset request...      Kai Klaas      12/05/12 06:21      
                                          That's what disturbs me greatly      Richard Erlacher      12/06/12 00:19      
                                             It IS disturbing!      Kai Klaas      12/06/12 08:02      
                                                Where this began ... at least for me ...       Richard Erlacher      12/06/12 09:43      
                                                   So, you took the hard road...      Kai Klaas      12/06/12 10:41      
                                                      We've all had that experience       Richard Erlacher      12/06/12 16:23      
   probable cause      Brent Wilson      02/04/13 20:32      
      Brent, this is very nice      Erik Malund      02/05/13 06:38      
         forum no longer down      Maarten Brock      02/05/13 07:33      
      Thank you!      Daniel Contarino      02/05/13 15:04      

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