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Kai Klaas
02/16/06 10:35
Read: 622 times
Germany


 
#110174 - Answers
Responding to: Suresh R's previous message
Suresh said:
port pin in this mode is used to switch 'ON' a PNP Tr
example code: clr p1.x

We had agreed some weeks ago, that we shouldn't talk about 'modes'.
Say instead: "If port is emitting logic low state." Or: "If port output is logic low." Or something similar.

Suresh said:
Doubt:
This shows different o/p high voltage rating. i need to know what does this signify in connecting a Transistor(NPN) to it.
Can this negative current drive the NPN transistors with presence of external pullups.

This negative current means, it's flowing outside of package, right what you need to turn-on a NPN transistor. Unfortunately this output current is not strong enough to fully turn-on a NPN, especially if its load current is rather high. Assume NPN must turn-on a load of 20mA. Then, as base current should be 1/20 of load current, about 1mA should flow into the base of NPN. A standard 80C51 output cannot deliver this current. An additional pull-up is needed.

Suresh said:
Logical 0 Input Current(IIL) (Ports 1,2,3) = -50 A when VIN = 0.45V
I would like to know what the above statement describes, having described the source and sink currents in 1 & 2.

It simply means, what it states: If you force the port pin, which was programmed as input by writing '1s' into according SFR, to logic low, then up to 50A will flow out of the pin.

Suresh said:
Logical 1 to 0 Transition Current(ITL) (Ports 1,2,3) = -650 A when VIN = 2V, VCC = 5V 10%
HOw this should be taken care of while connecting the driver circuit to the port.

This means, that if you want to force a port pin, which was programmed as input by writing '1s' into according SFR, to logic low, that you must take care that source impedance is not too high. Here, less than 2V / 650A = ca. 3kOhm. Otherwise the potential at port pin will never fall down to less than 2V, which is needed to detect logic low state.

You should read the according 'bible' chapters, to learn how the port topology with its three active pull-ups works.

Kai

List of 19 messages in thread
TopicAuthorDate
AT89s52 Port pin clarifications:      Suresh R      02/16/06 02:14      
   nice copy, where is the question      Erik Malund      02/16/06 06:30      
   output characteristics      Jan Waclawek      02/16/06 06:53      
      most confusing post      Jez Smith      02/16/06 07:34      
   Answers      Kai Klaas      02/16/06 10:35      
      Logic 1 to 0 transition      Suresh R      02/17/06 05:01      
         You haven't read the 'bible' chapter...      Kai Klaas      02/17/06 08:38      
            no details about transition from logic 1      Suresh R      02/18/06 03:27      
               other way 'round      Jan Waclawek      02/18/06 04:21      
               There ARE!!      Kai Klaas      02/18/06 06:54      
                  pFET2      Suresh R      02/19/06 07:29      
                     Weak and very weak pull-ups      Kai Klaas      02/20/06 07:19      
      maintaining low source impedence?      Suresh R      02/20/06 03:39      
         by making thje driver a sink............      Abhishek Singh      02/21/06 10:02      
         Pull-downs create problems      Kai Klaas      02/22/06 08:00      
            Maximum IOL per port pin: 10 mA ?      Suresh R      02/23/06 04:43      
               IOL      Kai Klaas      02/23/06 06:22      
                  IOL = 10mA or 1.6mA? in port 1      Suresh R      02/23/06 22:26      
                     Depends on load      Kai Klaas      02/25/06 07:40      

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