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Jan Waclawek
02/18/06 04:21
Read: 541 times
Bratislava
Slovakia


 
#110268 - other way 'round
Responding to: Suresh R's previous message
I think you are confused a bit...

The "current peak" at cca 2V is the current supplied from the pin the port has been set to "1" and some external device attempts to pull it down.

When you set the port to "0" it simply sinks the current as per your list item 1. Only this is relevant for connecting PNP transistor (base).

Jan Waclawek

List of 19 messages in thread
TopicAuthorDate
AT89s52 Port pin clarifications:      Suresh R      02/16/06 02:14      
   nice copy, where is the question      Erik Malund      02/16/06 06:30      
   output characteristics      Jan Waclawek      02/16/06 06:53      
      most confusing post      Jez Smith      02/16/06 07:34      
   Answers      Kai Klaas      02/16/06 10:35      
      Logic 1 to 0 transition      Suresh R      02/17/06 05:01      
         You haven't read the 'bible' chapter...      Kai Klaas      02/17/06 08:38      
            no details about transition from logic 1      Suresh R      02/18/06 03:27      
               other way 'round      Jan Waclawek      02/18/06 04:21      
               There ARE!!      Kai Klaas      02/18/06 06:54      
                  pFET2      Suresh R      02/19/06 07:29      
                     Weak and very weak pull-ups      Kai Klaas      02/20/06 07:19      
      maintaining low source impedence?      Suresh R      02/20/06 03:39      
         by making thje driver a sink............      Abhishek Singh      02/21/06 10:02      
         Pull-downs create problems      Kai Klaas      02/22/06 08:00      
            Maximum IOL per port pin: 10 mA ?      Suresh R      02/23/06 04:43      
               IOL      Kai Klaas      02/23/06 06:22      
                  IOL = 10mA or 1.6mA? in port 1      Suresh R      02/23/06 22:26      
                     Depends on load      Kai Klaas      02/25/06 07:40      

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