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Per Westermark
06/22/10 11:31
Read: 875 times
Sweden


 
#176837 - Most concepts already exists in the wild
Responding to: ???'s previous message
You are now describing the piplelined and superscalar implementation of modern high-end processors.

The processors in PC:s, game consoles or more expensive mobile phones can do multiple instructions/clock cycle even if they have only a single core. The Pentium processor was the first x86 processor that was superscalar. It could issue one floating point and two integer instructions in the same clock cycle.

By increasing the length of the pipleline, the processor can detect dependencies between instructions and then reorder the instructions to allow multiple instructions to be started at the same time.

The next step up from this is the hyperthreading that got introduced in some of the faster P4 processors. A single processor core has double set of registers (including program counters) allowing the processor to instantly allocate the computation units (ALU, multiplier, ...) to the second program when instructions from the first program stalls.

The increase in pipeline length needed for instruction reordering and efficient superscalar performance increases the cost of a stall - for example when the memory can't keep up and supply the data in time because the data wasn't already in the cache. The hyperthreading reduced the loss from such stalls since two applications needed to stall at the same time for the core to need to idle.

A new i7 processor can have four cores - each with hyperthreading and each with superscalar performance where multiple instructions are issued each clock cycle.

And beside these things, most newer processors also have SIMD instructions for multimedia or signal processing.

But (yes, there is always a but) the increases in pipeline lengths to get the superscalar performance, and the use of data and code caches means that the timing will be more and more random. A traditional microcontroller is fully deterministic. If interrupts are not disabled, then you can compute the number of clock cycles from an event until the ISR has been activated.

With a high-end processor, you may have three levels of cache that needs to be filled to get the initial instruction. If accessing virtual memory, you may get exceptions where you basically reach another level of ISR to map in/out the required memory. This can happen for the instruction bytes and/or for the data bytes. Depending on what other instructions the processor has been busy with previously, it will take an unknown number of cycles from an instruction enters the pipeline until the required execution unit (such as an ALU) is ready to process the instruction. A processor with a 17-step pipeline will obviously have way longer time from fetching an instruction until executing it compared to a processor with a 2-step pipeline.

This is a big reason why most microcontrollers are still running at very sedate speeds even if they are using 0.13u process technology. The lower-end ARM chips are very nice. The high-end ARM chips have walked a long way towards current PC-class technologies, which makes them excellent for running Linux systems, but not as good at hard real-time for fulfilling us or sub-us requirements.

Another concept that does exist is VLIW - very large instruction word. You make the processor load multiple concurrent instructions with each read, and processes these instructions in lock-step. Running the instructions in lock-step is what differs from a traditional superscalar processor where the instructions are completely independant and the processor itself takes care of any reordering to get max speed out of the core. With VLIW, the compiler must figure out which instructions that may be processed at the same time and merge these sub-instructions into a complete instruction word.

Yet another thing that does have similarities with your ideas is the virtual design of new processors. They may have multiple cores that shares a pool of execution units and the individual cores then grabs any free address decoder, multiplier or whatever it may need. By pooling the resources, you can squeeze just a bit more performance out of the chip by reducing the stall time - this is a follow-up to the hyperthreading. Having virtual processors means that you could basically have a server that allocates 30% CPU resources to a specific application - not by just adjusting the number of time slices but by adjusting the number of core elements. You get a very fine-grained tool for handling CPU-time quota, making sure that your multimedia stream is guaranteed to have 1.2 billion multiplies and 3 billion adds/second.

There are also companies that develops processing solutions based on graphcis cards, where the modern, programmable, pipelines of the graphics cards are used to dynamically form computation networks. There exists supercomputers based on graphics cards, but I don't think any manufacturer have any processor product that would be suitable for control applications. Most pipelined solutions are about pure power, and not about quick responses.

List of 104 messages in thread
TopicAuthorDate
So What Is An 8051/2 Good For?      Andy Neil      06/17/10 16:35      
   thoughts      Erik Malund      06/18/10 04:36      
      The Future of the 805x      Joseph Hebert      06/18/10 08:40      
         PARC      Rob Klein      06/18/10 09:01      
            Bigger Hammers      Joseph Hebert      06/18/10 09:37      
               re: Bigger Hammers      Rob Klein      06/18/10 10:59      
               The opposite problem seems more common here!      Andy Neil      06/18/10 15:50      
         Would Toyota have had the problem if ...      Erik Malund      06/18/10 09:31      
            Toyota: Case in point      Joseph Hebert      06/18/10 09:46      
            RE: Toyota      Andy Neil      06/18/10 10:17      
               It was a mechanical fix ...      Richard Erlacher      06/18/10 22:37      
            Parallel Processing      Justin Fontes      06/18/10 10:35      
               Sometimes the practical reality is of little consequence      Richard Erlacher      06/18/10 22:45      
                  Totally Agree, but I was looking for a magic bullet      Justin Fontes      06/18/10 23:09      
                  RE: "outperform"      Andy Neil      06/19/10 01:10      
                     There are some operations ...      Richard Erlacher      06/19/10 06:19      
                        rephrased      Erik Malund      06/19/10 06:44      
                        Now, you are extrapolating      Per Westermark      06/19/10 06:44      
                           good points, but      Erik Malund      06/19/10 07:12      
                              How many 8051 chips uses 0.13u?      Per Westermark      06/19/10 08:57      
                                 not yet      Erik Malund      06/19/10 13:05      
                           not exactly ...      Richard Erlacher      06/20/10 09:39      
                              Do not get focused on one operation...      Michael Karas      06/20/10 10:20      
                              any 8-bit instruction can exist in a 32-bit processor      Per Westermark      06/20/10 12:14      
                                 Yes, but does it?      Richard Erlacher      06/22/10 07:54      
                                    So have you looked at any other processors?      Per Westermark      06/22/10 09:37      
                                       not a point of disagreement, but you missed it anyway      Richard Erlacher      06/22/10 22:50      
                                          A good point      Justin Fontes      06/22/10 23:10      
                                             beg to differ      Michael Karas      06/22/10 23:23      
                                             Disagree entirely!      Andy Neil      06/23/10 00:45      
                                          Yes, auto-increment/decrement is standard and not "feature"      Per Westermark      06/23/10 00:29      
                                             What I wanted to point out ...      Richard Erlacher      06/23/10 06:07      
                                                Same same all the time. no "one size fits".      Per Westermark      06/23/10 07:46      
                                                   and the most important point is (drumroll) ....      Erik Malund      06/23/10 09:49      
                                                Comparing Apples to Oranges      Andy Neil      06/23/10 08:03      
                                          Prices are comparable      Andy Neil      06/23/10 01:00      
               Parallel processing        Oliver Sedlacek      06/22/10 02:40      
                  Sweeping generalisation!      Andy Neil      06/22/10 03:22      
                     Not a magic silver bullit      Per Westermark      06/22/10 04:20      
                        Fond memories      Oliver Sedlacek      06/22/10 07:58      
                        A magic bullet      Justin Fontes      06/22/10 10:17      
                           Most concepts already exists in the wild      Per Westermark      06/22/10 11:31      
                           Another generalisation        Andy Neil      06/22/10 14:43      
                           Speed vs latency      Oliver Sedlacek      06/22/10 14:47      
                              Why 8051?      Andy Neil      06/22/10 15:08      
                                 Isn't it obvious?      Justin Fontes      06/22/10 23:17      
                                    ARM simpler than 8051      Oliver Sedlacek      06/23/10 00:21      
                                       Generalisation      Andy Neil      06/23/10 01:34      
                                          ARM 'MCUs' have their limitations too!      Valentin Angelovski      06/24/10 07:52      
                                             You normally engineer with a backup plan      Per Westermark      06/24/10 08:20      
                                    No, it's not!      Andy Neil      06/23/10 01:27      
                                       Im just trying to provide an argument      Justin Fontes      06/23/10 10:33      
                                          x bits are just one parameter among many      Per Westermark      06/23/10 11:27      
                                             Avoiding the issue      Justin Fontes      06/23/10 21:09      
                                                Avoiding what issue?      Per Westermark      06/24/10 03:10      
                                          They say it because it's true!      Andy Neil      06/24/10 00:59      
                                          RE: ARM is not the only 32-bitter      Andy Neil      06/24/10 01:15      
                                    Please don'g generalize      Per Westermark      06/23/10 01:28      
                                 Heterogenous multiprocessing widespread      Oliver Sedlacek      06/23/10 00:17      
                  Re: Multicore 8051      Valentin Angelovski      06/24/10 06:48      
                     ALU chaining      Oliver Sedlacek      06/24/10 06:57      
   Well... maybe      Jez Smith      06/18/10 14:47      
      A Linear Accelerator?      Joseph Hebert      06/18/10 15:28      
         Its one of these      Jez Smith      06/18/10 15:51      
      please, repeat      Stefan KAnev      06/19/10 04:56      
         All I was saying was      Jez Smith      06/19/10 10:39      
   So what the '51 are good for...      Jan Waclawek      06/21/10 13:54      
      Not terribly helpful      Andy Neil      06/21/10 14:46      
         Always up to the developers      Per Westermark      06/21/10 15:24      
            RE: The manufacturers tells us...      Andy Neil      06/21/10 15:30      
               Sales - "may be used for" presented as "recommended"      Per Westermark      06/21/10 16:41      
               pretty hot, low-power and small      Maarten Brock      06/22/10 15:17      
                  Automotive...      Andy Neil      06/22/10 15:26      
         but answers your original question (at least the one...      Jan Waclawek      06/22/10 10:19      
         MCS51 still rocking !!!      Kiran V. Sutar      06/23/10 05:14      
            Scale      Andy Neil      06/23/10 06:09      
            Missing the point      Andy Neil      06/23/10 06:21      
               Impossible to generalize into fields      Per Westermark      06/23/10 08:09      
                  An appropriate generalisation...      Andy Neil      06/23/10 10:20      
               You are right..Andy Neil      Kiran V. Sutar      06/24/10 05:27      
                  Cheers!      Andy Neil      06/24/10 05:43      
                     No..only AT89C52 can be used      Kiran V. Sutar      06/24/10 05:56      
                        why do you insist on Atmel?      Erik Malund      06/24/10 06:05      
                        what a strange post      Erik Malund      06/24/10 06:09      
                        Tools?      Andy Neil      06/24/10 07:12      
                           Multiple manufactuers with (almost) identical chips      Per Westermark      06/24/10 07:48      
                              Getting better      Andy Neil      06/24/10 08:52      
                                 Unified interrupt controller is really great      Per Westermark      06/24/10 09:28      
                           Yes, even with free tools for PIC/AVR      Kiran V. Sutar      06/24/10 08:38      
                              I mean no offense, but ...      Richard Erlacher      06/26/10 09:59      
                              Similar difficulties coming to 8051/2?      Andy Neil      06/26/10 10:28      
                                 Same same      Per Westermark      06/26/10 11:18      
                  Is it your purchase price or why so sure AVR or PIC are off?      Per Westermark      06/24/10 05:55      
                     Answer to Per and Erik...      Kiran V. Sutar      06/24/10 06:38      
                  Living in the past      John D. Maniraj      06/24/10 09:44      
                     Thanks John D. Maniraj      Kiran V. Sutar      06/25/10 03:54      
                     locking      Erik Malund      06/25/10 07:20      
                        RE: Locking      Andy Neil      06/25/10 07:32      
                        Agreed, but      John D. Maniraj      06/25/10 11:00      
                           fairly easy      Erik Malund      06/25/10 11:53      
      Don't forget consumer devices      David Good      06/24/10 13:45      
         A perfect application      David Good      06/25/10 10:49      
   8051 vs ARM      Valentin Angelovski      06/24/10 08:34      
   just thought of one case      Erik Malund      06/24/10 12:32      

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