I have the SPARTAN 3e 1600k dev board, I used the DCM to multiply 50MHz frequency by 6 to get 300MHz for both CLKFX and CLKFX180, the tool kept complaining about CLK0 not being used. So I edited the files generated by the core generator and removed every mention of CLK0, then the tool said there is timing problem while synthesizing then this warning disappeared.
Do I have to use the clk0 because I cannot un check it in the DCM core generator. The application note XAPP462 says that no need to use the clock feedback if clkfx to be used.
What about programmable input delays? IBUF_DELAY_VALUE and IFD_DELAY_VALUE? one can be programmed in 250ps step and the other in 500PS steps, are these accurate?

I just received my Altera CYCLONE III FPGA board which goes to 425MHz frequency and even 666MHZ for dram access. How do you compare Altera to Xilinx? I personally find Xilinx easier to use. Does Cyclone III have DCM or do they call it another name? Do they provide good application notes like Xilinx?
Mahmood