Email: Password: Remember Me | Create Account (Free)

Back to Subject List

Old thread has been locked -- no new posts accepted in this thread
Richard Erlacher
08/01/12 16:14
Read: 505 times
Denver, Co

#187983 - Perhaps certain CPLD's would do the job
Responding to: Mahmood Elnasser's previous message
IIRC, the CoolRunner-II (XILINX) family of CPLD's allows you to feed a separate supply to the I/O cells, while operating the logic at the "usual" voltage (3V3, I believe).

Several of the FPGA families that XILINX produced allowed the same on-chip level translation.

Doesn't the family you're using do this? ISTR that several of them, while operating at 1V5 or 1V8, still supported I/O at 3V3. The older Spartan-II family even was 5V0 tolerant.


List of 13 messages in thread
CPLD level translators      Mahmood Elnasser      05/15/12 03:42      
   TI Voltage level translators ?        Jim Granville      05/15/12 05:27      
      thanks      Mahmood Elnasser      05/16/12 01:03      
      Why specifically CPLD?      Andy Neil      05/16/12 15:17      
         True      Mahmood Elnasser      05/16/12 22:45      
            Perhaps certain CPLD's would do the job      Richard Erlacher      08/01/12 16:14      
               Wide Vcc CPLDs sadly rare      Jim Granville      08/02/12 15:09      
                  forgive my ignorance, but ...      Richard Erlacher      08/02/12 17:54      
                      some examples      Jim Granville      08/03/12 15:11      
                        Same for ARM      Per Westermark      08/03/12 18:56      
                           some small devices have OCR too      Jim Granville      08/03/12 23:14      
                              Bigger chips      Per Westermark      08/04/12 05:59      
            Altera FPGAs        Oliver Sedlacek      08/06/12 04:07      

Back to Subject List