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Josť A. Ruiz
06/01/13 03:48
Read: 2666 times
United Kingdom

#189840 - OCD for FPGA core
Hello all,

I want to add some on-chip debugging capability to a free 8051 FPGA core (,light52). In its present state, this core has no debug features and you have to program the FPGA every time you want to update the MCU firmware; this is too cumbersome a procedure for any practical application.

So I want to add the usual basic OCD capabilities: C source level debugging, breakpoints and variable examination, plus some means to upload object code onto the FPGA without re-running the synthesis.

I think the best approach would be implementing an existing debugging interface, that is, making the chip behave like a commercial 8051 chip so that it can be used with an existing IDE; for example the free IDE from SiLabs.
This IDE can optionally use a RS-232 adapter for debugging, and in principle I might replicate the funcionality of that adapter as an FPGA module to be bolted on to the MCS51 core. Except that I haven't found the serial protocol documented anywhere.

My questions are:

1) Does anybody have the documentation for SiLabs debugging protocol over RS-232?
2) What other IDEs or debuggers may I consider as debugging hosts (free if at all possible)?
3) What would you do if you wanted OCD on an existing FPGA core?

I am aware of other possibilities that are well documented (e.g. ccdebug or IAR's c-spy), but those would force me to write a driver or some other form of on-host program. I would like to avoid that if possible. I may have to write some sort of conversion tool for the chosen IDE's object code format, but that would be a second stage of the project; the first stage is connecting to the CPU using standard tools.

For all I know this problem may have been solved already but I haven't been able to find what I'm looking for. Before I embark in a reverse engineering sub-project I wanted to check with you; after all, this forum is *the* place to learn about 8051 stuff...

If I can't easily add OCD to the core, at least I will add some form of ISP-over-serial using some standard, free tool. That would be much easier but I want to try the best solution first.

Please note that the core in its present state is not fit for actual, real-world use (it has not passed any serious verification test bench), and the debugging features are not going to change that. I strongly advise you NOT to use it.

All advice is welcome, thank you for your thoughts!

List of 23 messages in thread
OCD for FPGA core      Josť A. Ruiz      06/01/13 03:48      
   Serial-to-EC2 reverse engineering      Josť A. Ruiz      06/01/13 06:12      
   C2spec.pdf      Jim Granville      06/01/13 06:36      
   Reality Check......        Michael Karas      06/01/13 08:24      
      Agreed      Josť A. Ruiz      06/01/13 12:53      
         multi-threaded      Jim Granville      06/01/13 16:54      
      FPGA and soft cores      Oliver Sedlacek      06/03/13 02:20      
         Yes ... but which debugger?       Richard Erlacher      06/03/13 10:48      
            Actually no      Oliver Sedlacek      06/04/13 01:55      
               Who's "they"      Richard Erlacher      06/04/13 12:48      
               I wouldn't use FPGA unless I need more than just the core      Richard Erlacher      06/07/13 14:50      
                  FPGA on-chip debugging redundant?      Josť A. Ruiz      06/14/13 02:49      
                  debugging embedded processors        Andy Peters      06/25/13 18:56      
                     That's good to know.      Richard Erlacher      06/26/13 11:13      
   nice idea      Maarten Brock      06/02/13 07:03      
      Von Neumann first      Josť A. Ruiz      06/02/13 10:23      
   if that were the case ...      Erik Malund      06/03/13 15:19      
      Poorly chosen acronym...      Josť A. Ruiz      06/14/13 02:59      
         On Chip Debug is common        Jim Granville      06/14/13 03:44      
            On Chip Debug *is* a very good idea indeed!      Andy Neil      06/15/13 13:44      
               PC        Maarten Brock      06/15/13 14:09      
                  PC        Michael Karas      06/17/13 06:55      
                     PC        Oliver Sedlacek      06/18/13 02:19      

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