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Oliver Sedlacek
06/04/13 01:55
Read: 1060 times
Uk


 
#189855 - Actually no
Responding to: Richard Erlacher's previous message
They don't seem to leave out any key bits for implementing their soft core in their FPGA.

List of 23 messages in thread
TopicAuthorDate
OCD for FPGA core      Josť A. Ruiz      06/01/13 03:48      
   Serial-to-EC2 reverse engineering      Josť A. Ruiz      06/01/13 06:12      
   C2spec.pdf      Jim Granville      06/01/13 06:36      
   Reality Check......        Michael Karas      06/01/13 08:24      
      Agreed      Josť A. Ruiz      06/01/13 12:53      
         multi-threaded      Jim Granville      06/01/13 16:54      
      FPGA and soft cores      Oliver Sedlacek      06/03/13 02:20      
         Yes ... but which debugger?       Richard Erlacher      06/03/13 10:48      
            Actually no      Oliver Sedlacek      06/04/13 01:55      
               Who's "they"      Richard Erlacher      06/04/13 12:48      
               I wouldn't use FPGA unless I need more than just the core      Richard Erlacher      06/07/13 14:50      
                  FPGA on-chip debugging redundant?      Josť A. Ruiz      06/14/13 02:49      
                  debugging embedded processors        Andy Peters      06/25/13 18:56      
                     That's good to know.      Richard Erlacher      06/26/13 11:13      
   nice idea      Maarten Brock      06/02/13 07:03      
      Von Neumann first      Josť A. Ruiz      06/02/13 10:23      
   if that were the case ...      Erik Malund      06/03/13 15:19      
      Poorly chosen acronym...      Josť A. Ruiz      06/14/13 02:59      
         On Chip Debug is common        Jim Granville      06/14/13 03:44      
            On Chip Debug *is* a very good idea indeed!      Andy Neil      06/15/13 13:44      
               PC        Maarten Brock      06/15/13 14:09      
                  PC        Michael Karas      06/17/13 06:55      
                     PC        Oliver Sedlacek      06/18/13 02:19      

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