/*--------------------------------------------------------------------------
REG51F.H

Header file for Philips 8xC31/51, 80C51Fx, 80C51Rx+
Copyright (c) 1988-2002 Keil Elektronik GmbH and Keil Software, Inc.
All rights reserved.
--------------------------------------------------------------------------*/

#ifndef __REG51F_H__
#define __REG51F_H__

/*  BYTE Registers  */
sfr at  P0   = 0x80;
sfr at  P1   = 0x90;
sfr at  P2   = 0xA0;
sfr at  P3   = 0xB0;
sfr at  PSW  = 0xD0;
sfr at  ACC  = 0xE0;
sfr at  B    = 0xF0;
sfr at  SP   = 0x81;
sfr at  DPL  = 0x82;
sfr at  DPH  = 0x83;
sfr at  PCON = 0x87;
sfr at  TCON = 0x88;
sfr at  TMOD = 0x89;
sfr at  TL0  = 0x8A;
sfr at  TL1  = 0x8B;
sfr at  TH0  = 0x8C;
sfr at  TH1  = 0x8D;
sfr at  IE   = 0xA8;
sfr at  IP   = 0xB8;
sfr at  SCON = 0x98;
sfr at  SBUF = 0x99;

/*  80C51Fx/Rx Extensions  */
sfr at  AUXR   = 0x8E;
sfr at  AUXR1  = 0xA2;
sfr at  SADDR  = 0xA9;
sfr at  IPH    = 0xB7;
sfr at  SADEN  = 0xB9;
sfr at  T2CON  = 0xC8;
sfr at  T2MOD  = 0xC9;
sfr at  RCAP2L = 0xCA;
sfr at  RCAP2H = 0xCB;
sfr at  TL2    = 0xCC;
sfr at  TH2    = 0xCD;
sfr at  CCON   = 0xD8;
sfr at  CMOD   = 0xD9;
sfr at  CCAPM0 = 0xDA;
sfr at  CCAPM1 = 0xDB;
sfr at  CCAPM2 = 0xDC;
sfr at  CCAPM3 = 0xDD;
sfr at  CCAPM4 = 0xDE;
sfr at  CL     = 0xE9;
sfr at  CCAP0L = 0xEA;
sfr at  CCAP1L = 0xEB;
sfr at  CCAP2L = 0xEC;
sfr at  CCAP3L = 0xED;
sfr at  CCAP4L = 0xEE;
sfr at  CH     = 0xF9;
sfr at  CCAP0H = 0xFA;
sfr at  CCAP1H = 0xFB;
sfr at  CCAP2H = 0xFC;
sfr at  CCAP3H = 0xFD;
sfr at  CCAP4H = 0xFE;


/*  BIT Registers  */
/*  PSW   */
sbit at  CY   = PSW^7;
sbit at  AC   = PSW^6;
sbit at  F0   = PSW^5;
sbit at  RS1  = PSW^4;
sbit at  RS0  = PSW^3;
sbit at  OV   = PSW^2;
sbit at  P    = PSW^0;

/*  TCON  */
sbit at  TF1  = TCON^7;
sbit at  TR1  = TCON^6;
sbit at  TF0  = TCON^5;
sbit at  TR0  = TCON^4;
sbit at  IE1  = TCON^3;
sbit at  IT1  = TCON^2;
sbit at  IE0  = TCON^1;
sbit at  IT0  = TCON^0;

/*  IE   */
sbit at  EA   = IE^7;
sbit at  EC   = IE^6;
sbit at  ET2  = IE^5;
sbit at  ES   = IE^4;
sbit at  ET1  = IE^3;
sbit at  EX1  = IE^2;
sbit at  ET0  = IE^1;
sbit at  EX0  = IE^0;

/*  IP   */ 
sbit at  PPC  = IP^6;
sbit at  PT2  = IP^5;
sbit at  PS   = IP^4;
sbit at  PT1  = IP^3;
sbit at  PX1  = IP^2;
sbit at  PT0  = IP^1;
sbit at  PX0  = IP^0;

/*  P3  */
sbit at  RD   = P3^7;
sbit at  WR   = P3^6;
sbit at  T1   = P3^5;
sbit at  T0   = P3^4;
sbit at  INT1 = P3^3;
sbit at  INT0 = P3^2;
sbit at  TXD  = P3^1;
sbit at  RXD  = P3^0;

/*  SCON  */
sbit at  SM0  = SCON^7; // alternatively "FE"
sbit at  FE   = SCON^7;
sbit at  SM1  = SCON^6;
sbit at  SM2  = SCON^5;
sbit at  REN  = SCON^4;
sbit at  TB8  = SCON^3;
sbit at  RB8  = SCON^2;
sbit at  TI   = SCON^1;
sbit at  RI   = SCON^0;
             
/*  P1  */
sbit at  CEX4 = P1^7;
sbit at  CEX3 = P1^6;
sbit at  CEX2 = P1^5;
sbit at  CEX1 = P1^4;
sbit at  CEX0 = P1^3;
sbit at  ECI  = P1^2;
sbit at  T2EX = P1^1;
sbit at  T2   = P1^0;

/*  T2CON  */
sbit at  TF2   = T2CON^7;
sbit at  EXF2  = T2CON^6;
sbit at  RCLK  = T2CON^5;
sbit at  TCLK  = T2CON^4;
sbit at  EXEN2 = T2CON^3;
sbit at  TR2   = T2CON^2;
sbit at  C_T2  = T2CON^1;
sbit at  CP_RL2= T2CON^0;

/*  CCON  */
sbit at  CF    = CCON^7;
sbit at  CR    = CCON^6;

sbit at  CCF4  = CCON^4;
sbit at  CCF3  = CCON^3;
sbit at  CCF2  = CCON^2;
sbit at  CCF1  = CCON^1;
sbit at  CCF0  = CCON^0;

#endif